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Texas Instruments /CC26x0 /I2C0 /MIMR

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Interpret as MIMR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IM)IM

Description

Master Interrupt Mask This register controls whether a raw interrupt is promoted to a controller interrupt.

Fields

IM

IM

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data